In the design of integrated circuits, particularly digital circuits, standard cells having fixed functions are widely used. Standard cells are typically pre-designed and saved in cell libraries. During an integrated circuit design process, the standard cells are retrieved from the cell libraries and placed into desired locations. Routing is then performed to connect the standard cells with each other and with other circuits on the chip.
Pre-defined design rules are followed when placing the standard cells into the desired locations. For example, spacing the active regions apart from the cell boundaries, so that when neighboring cells are abutted, the active regions of neighboring cells will not adjoin each other. The precaution associated with the active regions; however, incurs area penalties. The reserved space between the active regions and the cell boundaries results in a significant increase in the areas of the standard cells. In addition, because the active regions are spaced apart from the cell boundaries, when the standard cells are placed abutting each other, the active regions will not be joined, even if some of the active regions in the neighboring cells need to be electrically coupled. The spaced apart active regions have to be electrically connected using metal lines. The performance of the resulting device is worse than if the active regions are continuous.
Layout patterns and configurations can affect yield and design performance of the standard cells.